Project Oberon Changelog

2019-07-19

  • fixed CacheFlush in POL.ARM32.Glue.Mod, runs on RPi 4 but is too slow because of bad X11 implementation
  • based on Oberon-2019-01-21.dsk; this has symbol file changes!; removed support for generating ELF files

2018-12-13

  • added dummy POL.ARM32.GlueFB.Mod, GlueFB.arm.elf

2018-12-08

  • removed cp2o, cp2u; copying can now be done via "./poa Oberon.dsk -cp2o file1 file2"
  • POL.Tool includes POL.Mod to copy files to/from Linux from within Oberon
  • ARM compiler optimizations; global vars addressed PC relative

2018-11-10

  • changes in sleeping; cursor runs smoother now and with less idle workload; fixed TextFrames.TrackLine
  • MIPS compiler optimizations; using Zero register

2018-10-25

  • using 2 stage boot, first stage poX to adr 10000H, second stage Modules.XXX.bin to SysBase=200000H
  • merged Linux0 and Display0 to Glue
  • removed explicit registers for use of NEW and TRAP. RISC-V still has SysBase register
  • compiler compiles directly to ELF format for * marked modules

2018-08-31

  • pov should work with qemu-riscv32 version 3.0

2018-03-04

  • added MIPS version. Traps should work like in RISC5.

2018-02-14

  • added RISC-V version, Linux0 interface changes.

2017-12-27

  • changed colors, fixed bugs

2017-12-06

  • added HiDPI mode in Display. Just Compile POL.HiDPI.Display.Mod
  • fixed screen size of POL.X11.Display.Mod
  • fixed mouse handling outside of the window

2017-12-02

  • removed use of static base register; addresses are loaded directly via MOVW, MOVT instructions
  • fp variables are loaded/stored directly into FP registers
  • improved Index

2017-11-28

  • uses Module table and static base registers
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