Project Oberon / Linux

Current project is Project Oberon Java.

MIPS is dead. ARM32 is end of life and would need two different compiler, one for embedded with Thumb, and one for 64bit computing. RISC-V does both with same instruction set and this instruction set is well suited for Oberon. So instead supporting old hardware, better support single new hardware.

Project Oberon / Linux will become a port of Project Oberon to Linux on ARMv7 (32Bit), RISC-V (32Bit) and MIPS32 CPUs. All native versions run well via qemu on all other architectures. Symbol files are the same for all architectures. Object files get new endings. ".arm" for ARM, ".rsv" for RISC-V and ".mps" for MIPS. MIPS and ARM will not be supported any more. But expect RISC-V version run on different targets like Linux and FreeRTOS soon.

Project Oberon / RISC-V Linux

Oberon-07 is my favorite language, Po's compiler my favorite compiler, RISC-V my favorite CPU architecture and Linux my favorite operating system. Project Oberon / RISC-V Linux merges all together with native speed. If you don't yet have a RISC-V CPU, get qemu version 3.0 or later, extract pov.tgz and run "qemu-riscv32 pov". Conditional forward jumps are limited to 4kB. Due to change of syscalls, version in pol.tgz doesn't work any more. Use pov.tgz.

Project Oberon / ARM Linux

The CPU needs ARMv7 instruction set and the DIV instruction. Cortex-A7 (like Raspberry PI 2) and newer CPUs are fine. Non-Cortex and Cortex-A8 and Cortex-A9 are not supported. It compiles itself. It uses X11 window system. Used memory is fixed at 16MB excluding stack. Starting and compiling is extremely fast. Performance of this simple compiler is on par with other ARM compilers, including OP2 without register variables.

Project Oberon / MIPS Linux

Requires a MIPS32R2 CPU like the MIPS Creator CI20 or qemu-mipsel. Not tested much. Size of global variables currently limited to 32k. Bad code density due to 4 instruction for a trap, bad performance due to lack of register variables and bad memory subsystem of the Ingenic JZ4780 ┬ÁP.


pol.tgz: contains disk file Oberon.dsk and all ARM, RISC-V and MIPS Linux commands; uncompress with "tar xzf pol.tgz". You can also run the disk file with Peter De Wachter's Oberon RISC Emulator, but POL has more memory and more beautiful colours ;-)


Execute "./poa" "./pov" "./pom" for ARM/RISC-V or MIPS. Default disk file is Oberon.dsk. For a different disk file run "./poa file.dsk".

Web Oberon

Web Oberon will become the port of Project Oberon to WebAssembly. IMO, WASM fits perfectly with Oberon. Some advantages are explained in []. Compiler port should be fairly simple, however currently WASM needs JavaScript glue code. As I have no clue about JavaScript and Web programming the port will take time.

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